SiFive Core Designer (SCD) unlocks new possibilities by enabling engineers to explore the architectural design space of a CPU. With our Software-as-a Service (SaaS) application, customers can create and customize RISC-V core IP -- from their laptops. Working within a Core Series (a “class” of Core p...

The traditional cadence for microarchitecture updates is usually tied to process technology nodes or ground-up redesigns. The SiFive Core IP portfolio offers scalable microarchitectures from efficient application multi-core processors capable of running Linux, to tiny, power-sipping cores suitable f...

As we make our way around the world meeting and engaging with others in the semiconductor and hardware design community, we are seeing an increased interest in RISC-V based hardware innovation. This is due in large part to the emergence of market-ready RISC-V core IP, development tools and silicon ...

We just wrapped up our six-city tour in Europe, which included Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam. Together with our co-hosts, Qamcom, Syntacore, Imagination Technologies and Mentor; and ecosystem partners, Rambus, IAR Systems, UltraSoC, Antmicro, SecureRF, Credo and lowRIS...

Hello Cambridge, Grenoble, Stockholm, Moscow, Munich and Amsterdam Our 2019 global symposiums and workshops have been hugely successful in promoting the RISC-V ISA and fostering expansive collaboration within the open-source community. It's invigorating to see how the worldwide semiconductor ecosyst...

Ever since we launched Freedom Studio in 2017, it has been a great way to quickly and easily get started writing code for SiFive platforms, whether those platforms are development boards such as the HiFive1 Rev B, Digilent Arty FPGA, or even our testbench, which ships along with SiFive IP deliverab...