All Aboard, Part 11: RISC-V Hackathon, Presented by SiFive

Date: Monday, March 12 – Wednesday, March 14
Time: 10:30am Monday – 1:00pm Wednesday
Location: Embedded Linux Conference, Hilton Portland Downtown, Skyline II, Floor 23

UPDATE 2 (3/7/2018)

We’ve doubled the cash prize to $2,000 for each challenge!

Plus we’ve added a “coolest demo” category, with the same prize package as the other challenges (a HiFive Unleashed board plus the $2,000).

UPDATE (3/7/2018)

We've seen a lot of interest in the RISC-V hackathon from people who aren't interested in directly competing in one of the challenges, but are interested in working on RISC-V software in a room full of other RISC-V developers. Thus, we've decided to reserve some birds-of-a-feather (BoF) tables at the RISC-V hackathon where people who don't necessarily want to compete in the challenges can meet to talk or develop. Our current list of BoF tables is:

• Zephyr: The RISC-V Zephyr port has languished a bit over the last year, we want a focused session to make sure it works on all the targets we can find. We'll be bringing some Arty boards that can emulate the various SiFive Core IP targets, as well as some HiFive1 and LoFive boards. The goal here is to make sure that the RISC-V Zephyr port can run on all our boards.

• Linux Drivers: The RISC-V Linux port is still missing many upstream drivers. We'll have a handful of SiFive Unleashed boards available to help bring our drivers up to par, with the goal being to get the drivers in good enough shape that we can start submitting them upstream for review.

If you're interested in showing up then I'd still recommend you sign up for the Hackathon, as that way you'll be sure to have a board!

Back to the original post

Are you ready to UNLEASH your genius and own a HiFive Unleashed board two weeks before anyone else??

SiFive – the company founded by the creators of RISC-V – is hosting its first-ever hackathon for developers excited about RISC-V: the free and open ISA. Be among the very first to run code on the powerful Linux-capable RISC-V developer board: the HiFive Unleashed. We’re providing each developer or team a HiFive Unleashed and a HiFive1 (RISC-V microcontroller) board, with a challenge for each of the two boards. The team or developer that wins each challenge will take home their very own HiFive Unleashed board and a cash prize of $1,000.

Contest Specifics

There will be two separate contests, one targeting embedded development on the HiFive1 and one targeting application development on the HiFive Unleashed. The two contests are completely separate, and each person is allowed to join only one team for each contest. At least one team member must be present in order to deliver the final scores for judging and to pick up the prize winnings.

The HiFive1 contest is to achieve the highest speed writing and then reading back a single 1MB file to a FAT32 formatted file system via USB mass storage, using Palmer's computer as the USB host and the HiFive1 as the USB device. The final performance measurements will be taken using the wall time of this script

mount /dev/sdb1 /mnt
cp /home/palmer/testfile /mnt/testfile
umount /mnt
mount /dev/sdb1 /mnt
cp /mnt/testfile /tmp/testfile
umount /mnt
diff -a /home/palmer/testfile /tmp/testfile

The HiFive Unleashed contest is to archive the highest score running the JetStream 1.1 Benchmark natively on a HiFive Unleashed board clocked at 1.0GHz. This test will be performed on a HiFive Unleashed supplied as part of the hackathon, in an environment supplied by the team on a bootable micro SD card. The test's standard methodology (three runs) will be used, and the team with the highest geometric mean will be the winner.

In order to be eligible for judging, each team must hand Palmer their setups for testing (either a programmed HiFive1 or HiFive Unleashed) by noon on Wednesday, March 14th. The winners will be announced by 1:00pm on Wednesday, March 14th. Palmer and the SiFive team will make the final determination on which team or individual wins each of the two challenges.

How to Get Started

We're announcing the contest rules now because they're very ambitious and we expect teams to get started right away. Getting started with the HiFive1 challenge is fairly straight-forward if you own one, but a lot harder if you don't. While QEMU can emulate the HiFive1 to some degree, the real-time behavior of this challenge will make it hard to start without hardware to test on. If you're interested in the challenge then the best thing to do is probably to get familiar with the examples in SiFive's Freedom E SDK.

The HiFive Unleashed challenge will have a lot more time-intensive development effort required, so it will be a lot easier to start early. You should be able to boot a full Linux distribution in QEMU's full-system simulation mode to start bringing up your favorite web browser today. I recommend starting with SiFive's Freedom U SDK, which can boot a buildroot-based Linux image by running make qemu, before moving on to the Fedora disk images that Richard WM Jones recently posted on the RISC-V software discussion mailing list.

What to Bring

SiFive is bringing 50 HiFive1 and 50 HiFive Unleashed boards, along with the associated power supplies, USB cables, and SD cards. You'll need to bring your own computer that's capable of running your preferred development environment. We recommend pre-cloning the Freedom E and/or U SDKs to that computer in case there are any network headaches, and pre-building the relevant RISC-V toolchains as that can eat up a lot of time. If you're planning on working on the HiFive1 challenge then bringing some electronics equipment could help, but the intent is that none is required.

You should also bring your resume, because we're hiring!

Read more of the All Aboard blog series:

• All Aboard, Part 0: Introduction
• All Aboard, Part 1: The -march, -mabi, and -mtune arguments to RISC-V Compilers
• All Aboard, Part 2: Relocations in ELF Toolchains
• All Aboard, Part 3: Linker Relaxation in the RISC-V Toolchain
• All Aboard, Part 4: The RISC-V Code Models - 2026 Edition
• All Aboard, Part 5: Per-march and per-mabi Library Paths on RISC-V Systems
• All Aboard, Part 6: Booting a RISC-V Linux Kernel
• All Aboard, Part 7: Entering and Exiting the Linux Kernel on RISC-V
• All Aboard, Part 8: The RISC-V Linux Port is Upstream!
• All Aboard, Part 9: Paging and the MMU in the RISC-V Linux Kernel
• All Aboard, Part 10: How to Contribute to the RISC-V Software Ecosystem
• All Aboard, Part 11: RISC-V Hackathon, Presented by SiFive (current page)