资源与支持

SiFive 博客

来自 RISC-V 专家的最新洞察与深度技术解析

November 17, 2021

RISC-V is Inevitable

In just a few short years, RISC-V has become a category of utmost importance in tech; but, things are just getting started.

In 2014, the inventors of RISC-V (and founders of SiFive) published a very “modest” goal: for RISC-V to become the standard ISA for all computing devices. Ambitious at the time, but now we can confidently state that RISC-V has made its impact in our industry and is here to stay. RISC-V has become hugely important – strategic to companies and governments alike – and has already made its way into billions of chips and thousands of companies.

And… we’re just getting started.

This week, you may have noticed SiFive unveiled a new look on our website and a clear focus on high performance as we continue to drive RISC-V forward and define the future of compute. RISC-V is inevitable, and we are accelerating that timeline.

To our internal teams, this energy, aggressiveness, and decisive roadmap is nothing new. We’ve been building successful products for years, and now we’re growing faster than ever. Our resolve has never been stronger: to build the best-in-class processor IP that will be at the heart of future computing platforms — from artificial intelligence, machine learning, automotive, data center, mobile, to consumer markets. As we rapidly accelerate our performance capabilities, RISC-V truly will have no limits.

I’ve never been prouder of SiFive’s talented, passionate, and forward-thinking engineering and product teams. We’ve built a world-class portfolio of processor IP with over 300 design wins at more than 100 different customers around the world, including 8 of the top 10 semiconductor companies.

To our customers: thank you for being part of our journey and shared vision of the future. We’re honored by your trust and partnership, and we hope we’ve delivered an incredible customer experience along the way; but, buckle up, because we’re about to turn the corner and take RISC-V to new heights of performance and capabilities.

We’ll share more about our future plans at the upcoming RISC-V Summit on Dec 6-8, including details on our next-generation processor architecture that will be our fastest processor ever. We’re also hiring—across all positions and all career levels to accelerate our journey. If you’d like to work alongside the creators of RISC-V, collaborate with top industry partners, and help create the future of RISC-V, we invite you to join us.

The future of RISC-V has no limits. And I, for one, couldn’t be more excited!

Read more Insights from the RISC-V Experts

X100 系统安全防护:RISC-V 边缘端的 AI
Blog Post
X100 系统安全防护:RISC-V 边缘端的 AI
边缘 AI 是多种技术的融合,包括人工智能、物联网、边缘计算和嵌入式系统。它们共同发挥关键作用,使智能处理和决策能够在网络边缘实现。边缘 AI 利用嵌入式算法监控远程系统的活动,并处理由传感器及其他数据采集装置收集的非结构化数据,如温度、语言、脸部、运动、图像、距离及其他模拟输入信号。
在智能加速器上构建 AI 的未来 
Blog Post
在智能加速器上构建 AI 的未来 
在之前的《本地 AI 的完美解决方案》文章中,我们介绍了 SiFive Intelligence X100 产品系列的部分高层设计理念,并展示了与其他成熟厂商的性能对比。我们还讨论了 AI 市场的快速创新,以及这如何使设计“完美”的硬件加速器变得极具挑战性。而从客户那里可以看到的是,他们希望在加速器之外配备一个可编程的前端,我们称之为加速器控制单元(ACU)。这使得客户能将更多精力(和研发支出)集中在加速器的数据处理能力上,而控制和管理功能则交由 SiFive 基于 RISC-V 的方法来实现。
赋能远端边缘的 AI 创新
Blog Post
赋能远端边缘的 AI 创新
当前行业的焦点,更多投向那些能够将数据中心 AI 性能推向更高峰的硬件技术上。在 HotChips 2025 大会期间,对超大规模计算性能提升的需求占据绝大多数议程,而功能强大的大型芯片则成为了焦点。
Got a question?

Our AI chatbot can help!

Chat Now