资源与支持

SiFive 博客

来自 RISC-V 专家的最新洞察与深度技术解析

September 05, 2019

Collaboration, Inspiration and Progressive RISC-V Based Innovation in India and Bangladesh is Increasing at a Steady Pace

SiFive Speaker

Our SiFive Tech Symposiums and Workshops in India and Bangladesh were a huge success, and an inspirational endeavor as well. We hosted events in six cities total, including symposiums in Noida/Delhi, Pune, Bangalore and Hyderabad, and workshops in Chennai and Bangladesh’s capital city of Dhaka. Attendance was at capacity in all locations, and was over capacity in Pune and Bangalore.

Highlights From India

Our co-hosts in India – Western Digital, Microchip and IIT Madras – delivered powerful keynote presentations that underscored both the momentum surrounding the RISC-V ISA, and the cores and IP blocks that are accelerating the ecosystem and unleashing innovation at the edge and beyond.

One of the many highlights came from the Centre for Development of Advanced Computing (C-DAC) – one of our partners in Pune. They provided an update on their RISC-V based research and development program, and also expressed their eagerness to work with SiFive. We are equally eager!

Another highlight came from IIT Madras – our co-host in Chennai. We received an update on the RISC-V Shakti Project, which is the academically renowned open-source initiative at IIT Madras that is spearheading the building of processors based on the RISC-V ISA, as well as reference SoCs and other associated components. The technological accomplishments by the SHAKTI team are world class.

Representative from both C-DAC and IIT Madras extended an invitation to Krste Asanovic, co-founder and chief architect at SiFive and chairman of the RISC-V Foundation, as well as others from the SiFive team, to tour their labs and see their RISC-V based projects in action. The team thoroughly enjoyed and greatly appreciated seeing the labs and all of the progress being made. We thank both C-DAC and IIT Madras for hosting us.

The workshop in Chennai provided students and others with the unique opportunity to configure their own RISC-V core and bring up on an FPGA. Their excitement to learn, and to achieve the goal of their design in such a short amount of time was very evident. The participants felt encouraged to work more with the platform and to explore more possibilities.

Group Meeting Collaboration

Highlights From Bangladesh

Our co-hosts, Ulkasemi and Bangladesh University of Engineering and Technology (BUET), were instrumental in making the workshop in Dhaka a world class event with the participation of industrial experts, professors, and the vibrant student community of Dhaka. One of the highlights was the presentation by a professor from BUET who elaborated on the University’s research activity, and showcased some of the recent work.

There was also a hands-on workshop where students, industrial experts, and senior professors actively participated to implement customizable RISC-V cores using SiFive’s IP Core Designer. By the end of the day, all the attendees were well-versed in the RISC-V revolution. Collaboration Talks

Special Thanks

We are very grateful to Western Digital, Microchip, IIT Madras Ulkasemi and BUET, as well as our many ecosystem partners who helped immensely in making these events so successful. With each of these events, we are always humbled and inspired by the collective power of the minds that share in our endeavor to create and participate in a truly open source environment that fosters an unobstructed path to innovation.

What’s Next?

What’s Next?

The next SiFive Tech Symposium will take place in Middle East and Africa (MEA), followed shortly by symposiums in the Pacific Northwest, USA. For more information on these and other SiFive Tech Symposiums, please visit www.sifivetechsymposium.com

Read more Insights from the RISC-V Experts

X100 系统安全防护:RISC-V 边缘端的 AI
Blog Post
X100 系统安全防护:RISC-V 边缘端的 AI
边缘 AI 是多种技术的融合,包括人工智能、物联网、边缘计算和嵌入式系统。它们共同发挥关键作用,使智能处理和决策能够在网络边缘实现。边缘 AI 利用嵌入式算法监控远程系统的活动,并处理由传感器及其他数据采集装置收集的非结构化数据,如温度、语言、脸部、运动、图像、距离及其他模拟输入信号。
在智能加速器上构建 AI 的未来 
Blog Post
在智能加速器上构建 AI 的未来 
在之前的《本地 AI 的完美解决方案》文章中,我们介绍了 SiFive Intelligence X100 产品系列的部分高层设计理念,并展示了与其他成熟厂商的性能对比。我们还讨论了 AI 市场的快速创新,以及这如何使设计“完美”的硬件加速器变得极具挑战性。而从客户那里可以看到的是,他们希望在加速器之外配备一个可编程的前端,我们称之为加速器控制单元(ACU)。这使得客户能将更多精力(和研发支出)集中在加速器的数据处理能力上,而控制和管理功能则交由 SiFive 基于 RISC-V 的方法来实现。
赋能远端边缘的 AI 创新
Blog Post
赋能远端边缘的 AI 创新
当前行业的焦点,更多投向那些能够将数据中心 AI 性能推向更高峰的硬件技术上。在 HotChips 2025 大会期间,对超大规模计算性能提升的需求占据绝大多数议程,而功能强大的大型芯片则成为了焦点。
Got a question?

Our AI chatbot can help!

Chat Now