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来自 RISC-V 专家的最新洞察与深度技术解析

December 18, 2018

Open Standards Work!

We are really excited to see Wave Computing announce the open MIPS ISA and R6 processor core. SiFive would like to congratulate and welcome MIPS to the open-source community with its MIPS Open Initiative. The addition of the MIPS 32 and 64-bit open ISA will provide more options freely available to SoC designers. The open-source processor community, based on the RISC-V ISA, is thriving, and the addition of MIPS underscores the fact that the world is indeed becoming more open. Open ISA enables chip designers, innovators and academics to explore and expand their designs. The ability to add extensions to the base ISA makes it an attractive option for applications requiring special configurations. Chip designers no longer have to settle for an off-the-shelf processor. SiFive RISC-V cores have enabled a high degree of customization, which our customers have loved and used to create designs at 1/3 the power and area versus other solutions.

Modern SoCs have multiple ISAs. The issue is that proprietary ISAs come and go. The benefit of RISC-V is that it fosters a stable, free and open ISA for chip designers to rely on. The addition of MIPS has strengthened that same open-source community with choice, as SoC designers can now choose from a variety of open ISAs for their SoC designs. The open-source community, based on the RISC-V ISA, has gained tremendous momentum this year. For example, the recent RISC-V summit in Santa Clara, California, was attended by more than 1,100 registrants from 20 countries around the globe. In addition, SiFive’s recent 2018 global tour in 16 cities across India, China, Korea, Japan, Brazil and Israel included more than 5,000 registrants, and resulted in 500+ fabless semiconductor companies contacting SiFive. Clearly, the momentum is here. Want more evidence? A recent video on RISC-V attracted more than 2.5M views worldwide, and a second video is about to surpass that!

When the engineering community bands together, the possibilities are endless. We want to make the call to other hardware innovators out there, from GPUs to DSPs to AI accelerators of all shapes and sizes. We believe that open-standard specifications and hardware is the key to translating dreams and ideas of innovators, inventors and entrepreneurs into true working silicon. We welcome MIPS to the open-source community and welcome them into the semiconductor revolution!

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