The RISC-V Revolution is Going Global

This Month, you can join SiFive in Austin, Mountain View, or Boston

In 2018, we hosted several RISC-V technology symposia in India, China and Israel. These events were very successful in fueling the growing momentum surrounding the RISC-V ISA in these countries. It turns out that these events were just the tip of the iceberg. In 2019, SiFive is greatly expanding its reach by hosting over 50 SiFive Tech Symposia in cities throughout the world. The first leg of the global tour begins in the USA. In collaboration with our co-hosts and partner companies, we aim to foster deeper education, collaboration and engagement within the open-source community.

What’s Happening in Austin?

With Microchip as our co-host, we have created an exciting lineup of speakers, tutorials and demonstrations for the event in Austin, TX on February 21. Ted Speers, a member of the board of directors for the RISC-V Foundation, will present on the history and current state of the union of RISC-V. Naveed Sherwani, CEO of SiFive, will deliver a keynote presentation about the semiconductor industry and how RISC-V is leading a design revolution. Another keynote presentation will be given by Tim Morin, director of product line marketing for Microchip, who will present on RISC-V based SoC FPGAs. Esha Choukse, a PhD candidate in computer architecture at UT Austin, will present on compression in deep learning for AI applications. We will also have presentations by several other leaders in the RISC-V ecosystem, including NXP and Hex Five Security. Attendees will also have an opportunity to see demonstrations and learn about the latest design platforms for RISC-V based SoCs, development boards, IP, software and more.

What’s Happening in Mountain View?

This event will take place on February 26 and will feature several presentations by key industry veterans and luminaries. Martin Fink, CEO of the RISC-V Foundation and CTO at Western Digital, will deliver a keynote presentation on his vision for the RISC-V Foundation and his plans for the next several years. Naveed Sherwani, CEO of SiFive, will present on the semiconductor industry and how RISC-V is leading a design revolution. Another highlight at this event will be a keynote presentation by Darrin Jones, the senior director of technology development for cloud hardware infrastructure at Microsoft, who will present on SoC design in the cloud. Krste Asanovic, chairman of the RISC-V Foundation and co-founder and chief architect at SiFive, will also deliver a keynote presentation on customizable RISC-V AI SoC platforms. Other highlights include a presentation by Megan Wachs, VP of engineering at SiFive, who will talk about RISC-V development platforms. There will also be presentations by the CEOs of Imperas, Mobiveil and DinolusAI. Attendees will also have an opportunity to see demonstrations and learn about the latest design platforms for RISC-V based SoCs, development boards, IP, software and more.

What’s Happening in Boston?

With Bluespec as our co-host, this event on February 28 will include a powerful lineup of speakers. Rishiyur Nikhil, ISA Formal Spec Task Group Chair at the RISC-V Foundation, will present on the history and current state of the union of the RISC-V ISA, and will also deliver a keynote about RISC-V verification and design from his perspective as CTO at Bluespec. Krste Asanovic, chairman of the RISC-V Foundation and co-founder and chief architect at SiFive, will deliver a keynote presentation on RISC-V and its role in leading a design revolution. Adam Chlipala, associate professor of computer science at MIT, will present on the state of RISC-V academic research at MIT CSAIL. There will also be a presentation by Greg Sullivan, co-founder and chief scientist at Dover Microsystems. Attendees will also have an opportunity to see demonstrations and learn about the latest design platforms for RISC-V based SoCs, development boards, IP, software and more.

We look forward to seeing you in Austin, Mountain View and Boston!